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A parallel power supply system output power balance control system

Published:2021-10-26

Application No./Patent No.: 201710450756X       Application date: June 15, 2017.

Inventors/designers Peng Zhihui, Li Kai, Zhou Chen, Pan Xiaoming and Liu Wenwen.



The invention provides an output power balance control system of a parallel power supply system, which comprises a delta V generation circuit, a sampling circuit, a PWM modulation unit, a synchronous trigger unit, a power module control algorithm, a PWM driving circuit, a power converter main circuit and a detection circuit. Transform the difference δ P(t) = Pmax(t)-p (t) of output power standard into the on-time difference δ t of two PWM signals with duty ratios of pmax (t) and p (t) respectively, and then low-pass filter the PWM signals with on-time difference δ t to obtain the output power standard difference δ p (t) = pmax (t)-p (t). Furthermore, the output power balance control algorithm of parallel power supply system is implemented to realize the output power balance control function: this scheme avoids the deviation of average power reference caused by the interference of high-frequency switching signals and impedance imbalance, especially when the power modules are hot-plugged, the average power control response speed is superior to the dynamic response index of the existing scheme: this is because the δ PWM signal is rapidly adjusted after the modules are hot-plugged, and the output after adjustment of δ PWM can be realized only by a Synchronization signal syn, and its value is not affected by the number of power modules.


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